Multicycle Broadcast Bypass: Too Readily Overlooked

The bypass path, also called the forwarding path, allows processors to broadcast operands from one functional unit to another more quickly than through the register file. In modern superscalar out-of-order CPUs bypass is part of the execution pipeline stage, allowing dependant instructions to issue on subsequent cycles. In these modern machines, however, the bypass network complexity is becoming a limiting factor in frequency scaling. Traditionally, architects have been unwilling to separate the execute and bypass into different stages for fear of huge IPC losses. Through cycle-time calculations and cycleaccurate simulation with Spec2000int and Mediabench, though, we show that multicycle broadcast bypass is a simple and beneficial design choice. By allowing bypassed values multiple cycles to reach their destination, processor frequency can be increased more than IPC decreases. This solution involves no repeaters, no instruction steering, and no complex control logic. At 90nm, instruction throughput increases by 9% by separating the bypass into a separate stage on a four-wide machine, and throughput increases by 16% by adding two bypass stages to an eight-wide machine.